KallistiOS git master
Independent SDK for the Sega Dreamcast
Loading...
Searching...
No Matches
g2bus.h
Go to the documentation of this file.
1/* KallistiOS ##version##
2
3 g2bus.h
4 Copyright (C) 2002 Megan Potter
5 Copyright (C) 2023 Andy Barajas
6 Copyright (C) 2024 Ruslan Rostovtsev
7
8*/
9
10/** \file dc/g2bus.h
11 \brief G2 bus memory interface.
12 \ingroup system_g2bus
13
14 This file provides low-level support for accessing devices on the G2 bus in
15 the Dreamcast. The G2 bus contains the AICA, as well as the expansion port.
16 Generally, you won't be dealing with things at this level, but rather on the
17 level of the device you're actually interested in working with. Most of the
18 expansion port devices (the modem, bba, and lan adapter) all have their own
19 drivers that work off of this functionality.
20
21 The G2 bus is notoroiously picky about a lot of things. You have to be
22 careful to use the right access size for whatever you're working with. Also
23 you can't be doing PIO and DMA at the same time. Finally, there's a FIFO to
24 contend with when you're doing PIO stuff as well. Generally, G2 is a pain in
25 the rear, so you really do want to be using the higher-level stuff related
26 to each device if at all possible!
27
28 \author Megan Potter
29 \author Andy Barajas
30*/
31
32#ifndef __DC_G2BUS_H
33#define __DC_G2BUS_H
34
35#include <sys/cdefs.h>
36__BEGIN_DECLS
37
38#include <stdint.h>
39#include <arch/irq.h>
40#include <arch/types.h>
41
42#include <dc/fifo.h>
43
44/** \defgroup system_g2bus G2 Bus
45 \brief Driver for accessing the devices on the G2 Bus
46 \ingroup system
47
48 @{
49*/
50
51/** \name List of G2 Bus channels
52
53 AICA (SPU) is channel 0, BBA uses channel 1. CH2_DMA_G2CHN and
54 CH3_DMA_G2CHN are not currently tied to any specific device.
55
56 \note
57 A change in the implementation has rendered *_DMA_MODE and *_DMA_SHCHN
58 obsolete.
59
60 In the current implementation, *_DMA_MODE should always be set to zero
61 (representing CPU_TRIGGER). There is also no involvement of SH4-DMA with
62 G2-DMA; therefore, the *_DMA_SHCHN values have been deprecated.
63
64 @{
65*/
66#define G2_DMA_CHAN_SPU 0 /**< \brief AICA: G2 channel 0 */
67#define G2_DMA_CHAN_BBA 1 /**< \brief BBA: G2 channel 1 */
68#define G2_DMA_CHAN_CH2 2 /**< \brief CH2: G2 channel 2 */
69#define G2_DMA_CHAN_CH3 3 /**< \brief CH3: G2 channel 3 */
70/** @} */
71
72/** \brief G2Bus DMA direction
73
74 The direction you want the data to go. SH4 to AICA, BBA, etc use
75 SH4TOG2BUS, otherwise G2BUSTOSH4.
76*/
77#define G2_DMA_TO_G2 0
78#define G2_DMA_TO_SH4 1
79
80/** \brief G2Bus DMA interrupt callback type.
81
82 Functions that act as callbacks when G2-DMA completes should be of this type.
83 These functions will be called inside an interrupt context, so don't try to
84 use anything that might stall.
85
86 \param data User data passed in to the g2_dma_transfer()
87 function.
88*/
89typedef void (*g2_dma_callback_t)(void *data);
90
91/** \brief Perform a DMA transfer between SH-4 RAM and G2 Bus
92
93 This function copies a block of data between SH-4 RAM and G2 Bus via DMA.
94 You specify the direction of the copy (SH4TOG2BUS/G2BUSTOSH4). There are all
95 kinds of constraints that must be fulfilled to actually do this, so
96 make sure to read all the fine print with the parameter list.
97
98 If a callback is specified, it will be called in an interrupt context, so
99 keep that in mind in writing the callback.
100
101 \param sh4 Where to copy from/to. Must be 32-byte aligned.
102 \param g2bus Where to copy from/to. Must be 32-byte aligned.
103 \param length The number of bytes to copy. Must be a multiple of
104 32.
105 \param block Non-zero if you want the function to block until the
106 DMA completes.
107 \param callback A function to call upon completion of the DMA.
108 \param cbdata Data to pass to the callback function.
109 \param dir SH4TOG2BUS or G2BUSTOSH4.
110 \param mode Ignored; for compatibility only.
111 \param g2chn See g2b_channels.
112 \param sh4chn Ignored; for compatibility only.
113 \retval 0 On success.
114 \retval -1 On failure. Sets errno as appropriate.
115
116 \par Error Conditions:
117 \em EINPROGRESS - DMA already in progress \n
118 \em EFAULT - sh4 and/or g2bus is not 32-byte aligned \n
119 \em EINVAL - Invalid g2chn
120 \em EIO - I/O error
121
122*/
123int g2_dma_transfer(void *sh4, void *g2bus, size_t length, uint32_t block,
124 g2_dma_callback_t callback, void *cbdata,
125 uint32_t dir, uint32_t mode, uint32_t g2chn, uint32_t sh4chn);
126
127/** \brief Initialize DMA support.
128
129 This function sets up the DMA support for transfers to/from the G2 Bus.
130
131 \retval 0 On success (no error conditions defined).
132*/
133int g2_dma_init(void);
134
135/** \brief Shutdown DMA support. */
137
138/** \brief G2 context
139
140 A G2 context containing the states of IRQs and G2 DMA. This struct
141 is used in with g2_lock() and g2_unlock().
142*/
143typedef struct {
144 int irq_state; /** \brief IRQ state when entering a G2 critical block */
145} g2_ctx_t;
146
147/* Internal constants to access suspend registers for G2 DMA. They are not meant for
148 user-code use. */
149/** \cond */
150#define G2_DMA_SUSPEND_SPU (*((vuint32 *)0xa05f781C))
151#define G2_DMA_SUSPEND_BBA (*((vuint32 *)0xa05f783C))
152#define G2_DMA_SUSPEND_CH2 (*((vuint32 *)0xa05f785C))
153/** \endcond */
154
155/** \brief Disable IRQs and G2 DMA
156
157 This function makes the following g2_read_*()/g2_write_*() functions atomic
158 by disabling IRQs and G2 DMA and storing their states. Pass the context
159 created by this function to g2_unlock() to re-enable IRQs and G2 DMA.
160
161 \return The context containing the IRQ and G2 DMA states.
162*/
163static inline g2_ctx_t g2_lock(void) {
164 g2_ctx_t ctx;
165
166 ctx.irq_state = irq_disable();
167
168 /* Suspend any G2 DMA */
169 G2_DMA_SUSPEND_SPU = 1;
170 G2_DMA_SUSPEND_BBA = 1;
171 G2_DMA_SUSPEND_CH2 = 1;
172
173 while(FIFO_STATUS & (FIFO_SH4 | FIFO_G2));
174
175 return ctx;
176}
177
178/** \brief Enable IRQs and G2 DMA
179
180 This function restores the IRQ and G2 DMA states using the context value
181 generated by g2_lock().
182
183 \param ctx The context containing IRQ and G2 DMA states.
184*/
185static inline void g2_unlock(g2_ctx_t ctx) {
186 /* Restore suspended G2 DMA */
187 G2_DMA_SUSPEND_SPU = 0;
188 G2_DMA_SUSPEND_BBA = 0;
189 G2_DMA_SUSPEND_CH2 = 0;
190
192}
193
194
195#undef G2_DMA_SUSPEND_SPU
196#undef G2_DMA_SUSPEND_BBA
197#undef G2_DMA_SUSPEND_CH2
198
199/** \brief Read one byte from G2.
200
201 This function reads a single byte from the specified address, taking all
202 necessary precautions that are required for accessing G2.
203
204 \param address The address in memory to read.
205 \return The byte read from the address specified.
206*/
207uint8_t g2_read_8(uintptr_t address);
208
209/** \brief Write a single byte to G2.
210
211 This function writes one byte to the specified address, taking all the
212 necessary precautions to ensure your write actually succeeds.
213
214 \param address The address in memory to write to.
215 \param value The value to write to that address.
216*/
217void g2_write_8(uintptr_t address, uint8_t value);
218
219/** \brief Read one 16-bit word from G2.
220
221 This function reads a single word from the specified address, taking all
222 necessary precautions that are required for accessing G2.
223
224 \param address The address in memory to read.
225 \return The word read from the address specified.
226*/
227uint16 g2_read_16(uintptr_t address);
228
229/** \brief Write a 16-bit word to G2.
230
231 This function writes one word to the specified address, taking all the
232 necessary precautions to ensure your write actually succeeds.
233
234 \param address The address in memory to write to.
235 \param value The value to write to that address.
236*/
237void g2_write_16(uintptr_t address, uint16_t value);
238
239/** \brief Read one 32-bit dword from G2.
240
241 This function reads a single dword from the specified address, taking all
242 necessary precautions that are required for accessing G2.
243
244 \param address The address in memory to read.
245 \return The dword read from the address specified.
246*/
247uint32_t g2_read_32(uintptr_t address);
248
249/** \brief Non-blocked read one 32-bit dword from G2.
250
251 This function reads a single dword from the specified address, without all
252 necessary precautions that are required for accessing G2.
253
254 \param address The address in memory to read.
255 \return The dword read from the address specified.
256*/
257static inline uint32_t g2_read_32_raw(uintptr_t address) {
258 return *((volatile uint32_t *)address);
259}
260
261/** \brief Write a 32-bit dword to G2.
262
263 This function writes one dword to the specified address, taking all the
264 necessary precautions to ensure your write actually succeeds.
265
266 \param address The address in memory to write to.
267 \param value The value to write to that address.
268*/
269void g2_write_32(uintptr_t address, uint32_t value);
270
271/** \brief Non-blocked write a 32-bit dword to G2.
272
273 This function writes one dword to the specified address, without all the
274 necessary precautions to ensure your write actually succeeds.
275
276 \param address The address in memory to write to.
277 \param value The value to write to that address.
278*/
279static inline void g2_write_32_raw(uintptr_t address, uint32_t value) {
280 *((volatile uint32_t *)address) = value;
281}
282
283/** \brief Read a block of bytes from G2.
284
285 This function acts as memcpy() for copying data from G2 to system memory. It
286 will take the necessary precautions before accessing G2 for you as well.
287
288 \param output Pointer in system memory to write to.
289 \param address The address in G2-space to read from.
290 \param amt The number of bytes to read.
291*/
292void g2_read_block_8(uint8_t * output, uintptr_t address, size_t amt);
293
294/** \brief Write a block of bytes to G2.
295
296 This function acts as memcpy() for copying data to G2 from system memory. It
297 will take the necessary precautions for accessing G2.
298
299 \param input The pointer in system memory to read from.
300 \param address The address in G2-space to write to.
301 \param amt The number of bytes to write.
302*/
303void g2_write_block_8(const uint8_t * input, uintptr_t address, size_t amt);
304
305/** \brief Read a block of words from G2.
306
307 This function acts as memcpy() for copying data from G2 to system memory,
308 but it copies 16 bits at a time. It will take the necessary precautions
309 before accessing G2 for you as well.
310
311 \param output Pointer in system memory to write to.
312 \param address The address in G2-space to read from.
313 \param amt The number of words to read.
314*/
315void g2_read_block_16(uint16_t * output, uintptr_t address, size_t amt);
316
317/** \brief Write a block of words to G2.
318
319 This function acts as memcpy() for copying data to G2 from system memory,
320 copying 16 bits at a time. It will take the necessary precautions for
321 accessing G2.
322
323 \param input The pointer in system memory to read from.
324 \param address The address in G2-space to write to.
325 \param amt The number of words to write.
326*/
327void g2_write_block_16(const uint16_t * input, uintptr_t address, size_t amt);
328
329/** \brief Read a block of dwords from G2.
330
331 This function acts as memcpy() for copying data from G2 to system memory,
332 but it copies 32 bits at a time. It will take the necessary precautions
333 before accessing G2 for you as well.
334
335 \param output Pointer in system memory to write to.
336 \param address The address in G2-space to read from.
337 \param amt The number of dwords to read.
338*/
339void g2_read_block_32(uint32_t * output, uintptr_t address, size_t amt);
340
341/** \brief Write a block of dwords to G2.
342
343 This function acts as memcpy() for copying data to G2 from system memory,
344 copying 32 bits at a time. It will take the necessary precautions for
345 accessing G2.
346
347 \param input The pointer in system memory to read from.
348 \param address The address in G2-space to write to.
349 \param amt The number of dwords to write.
350*/
351void g2_write_block_32(const uint32_t * input, uintptr_t address, size_t amt);
352
353/** \brief Set a block of bytes to G2.
354
355 This function acts as memset() for setting a block of bytes on G2. It will
356 take the necessary precautions for accessing G2.
357
358 \param address The address in G2-space to write to.
359 \param c The byte to write.
360 \param amt The number of bytes to write.
361*/
362void g2_memset_8(uintptr_t address, uint8_t c, size_t amt);
363
364/** \brief Wait for the G2 write FIFO to empty.
365
366 This function will spinwait until the G2 FIFO indicates that it has been
367 drained. The FIFO is 32 bytes in length, and thus when accessing AICA you
368 must do this at least for every 8 32-bit writes that you execute.
369*/
370void g2_fifo_wait(void);
371
372/** @} */
373
374__END_DECLS
375
376#endif /* __DC_G2BUS_H */
377
Macros to assess FIFO status.
void irq_restore(irq_mask_t v)
Restore IRQ state.
irq_mask_t irq_disable(void)
Disable interrupts.
#define FIFO_G2
Definition fifo.h:53
#define FIFO_SH4
Definition fifo.h:54
#define FIFO_STATUS
Address of the FIFO status register.
Definition fifo.h:35
void g2_write_32(uintptr_t address, uint32_t value)
Write a 32-bit dword to G2.
static uint32_t g2_read_32_raw(uintptr_t address)
Non-blocked read one 32-bit dword from G2.
Definition g2bus.h:257
uint16 g2_read_16(uintptr_t address)
Read one 16-bit word from G2.
static void g2_unlock(g2_ctx_t ctx)
Enable IRQs and G2 DMA.
Definition g2bus.h:185
void g2_read_block_16(uint16_t *output, uintptr_t address, size_t amt)
Read a block of words from G2.
void g2_write_block_8(const uint8_t *input, uintptr_t address, size_t amt)
Write a block of bytes to G2.
int g2_dma_init(void)
Initialize DMA support.
void g2_memset_8(uintptr_t address, uint8_t c, size_t amt)
Set a block of bytes to G2.
static g2_ctx_t g2_lock(void)
Disable IRQs and G2 DMA.
Definition g2bus.h:163
static void g2_write_32_raw(uintptr_t address, uint32_t value)
Non-blocked write a 32-bit dword to G2.
Definition g2bus.h:279
void(* g2_dma_callback_t)(void *data)
G2Bus DMA interrupt callback type.
Definition g2bus.h:89
void g2_write_8(uintptr_t address, uint8_t value)
Write a single byte to G2.
int g2_dma_transfer(void *sh4, void *g2bus, size_t length, uint32_t block, g2_dma_callback_t callback, void *cbdata, uint32_t dir, uint32_t mode, uint32_t g2chn, uint32_t sh4chn)
Perform a DMA transfer between SH-4 RAM and G2 Bus.
void g2_write_16(uintptr_t address, uint16_t value)
Write a 16-bit word to G2.
uint32_t g2_read_32(uintptr_t address)
Read one 32-bit dword from G2.
uint8_t g2_read_8(uintptr_t address)
Read one byte from G2.
void g2_read_block_8(uint8_t *output, uintptr_t address, size_t amt)
Read a block of bytes from G2.
void g2_dma_shutdown(void)
Shutdown DMA support.
void g2_write_block_16(const uint16_t *input, uintptr_t address, size_t amt)
Write a block of words to G2.
void g2_write_block_32(const uint32_t *input, uintptr_t address, size_t amt)
Write a block of dwords to G2.
void g2_read_block_32(uint32_t *output, uintptr_t address, size_t amt)
Read a block of dwords from G2.
void g2_fifo_wait(void)
Wait for the G2 write FIFO to empty.
unsigned short uint16
16-bit unsigned integer
Definition types.h:34
Interrupt and exception handling.
G2 context.
Definition g2bus.h:143
int irq_state
Definition g2bus.h:144
Common integer types.