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KallistiOS git master
Independent SDK for the Sega Dreamcast
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Driver and API for managing the SH4's cache More...
Files | |
| file | cache.h |
| Cache management functionality. | |
| file | cache.h |
| Cache management functionality. | |
| file | cache.h |
| Cache management functionality. | |
Macros | |
| #define | CACHE_L1_ICACHE_SIZE ARCH_CACHE_L1_ICACHE_SIZE |
| Level 1 instruction cache size. | |
| #define | CACHE_L1_ICACHE_ASSOC ARCH_CACHE_L1_ICACHE_ASSOC |
| Level 1 instruction cache associativity. | |
| #define | CACHE_L1_ICACHE_LINESIZE ARCH_CACHE_L1_ICACHE_LINESIZE |
| L1 instruction cache line size. | |
| #define | CACHE_L1_DCACHE_SIZE ARCH_CACHE_L1_DCACHE_SIZE |
| Level 1 data cache size. | |
| #define | CACHE_L1_DCACHE_ASSOC ARCH_CACHE_L1_DCACHE_ASSOC |
| Level 1 data cache associativity. | |
| #define | CACHE_L1_DCACHE_LINESIZE ARCH_CACHE_L1_DCACHE_LINESIZE |
| L1 data cache line size. | |
| #define | CACHE_L2_CACHE_SIZE ARCH_CACHE_L2_CACHE_SIZE |
| Level 2 cache size. | |
| #define | CACHE_L2_CACHE_ASSOC ARCH_CACHE_L2_CACHE_ASSOC |
| Level 2 cache associativity. | |
| #define | CACHE_L2_CACHE_LINESIZE ARCH_CACHE_L2_CACHE_LINESIZE |
| Level 2 cache line size. | |
Functions | |
| static void | icache_inval_range (uintptr_t start, size_t count) |
| Invalidate the instruction cache. | |
| static void | icache_sync_range (uintptr_t start, size_t count) |
| Synchronize the instruction cache. | |
| static void | dcache_inval_range (uintptr_t start, size_t count) |
| Invalidate the data/operand cache. | |
| static void | dcache_wback_range (uintptr_t start, size_t count) |
| Perform a write-back on the data/operand cache. | |
| static void | dcache_wback_all (void) |
| Perform a write-back on the the whole data/operand cache. | |
| static void | dcache_purge_range (uintptr_t start, size_t count) |
| Purge the data/operand cache. | |
| static void | dcache_purge_all (void) |
| Purge all the data/operand cache. | |
| static void | dcache_pref_line (const void *src) |
| Prefetch one block to the data/operand cache. | |
| static void | dcache_alloc_line (void *src) |
| Allocate one cache line of the data/operand cache. | |
| static void | dcache_zero_alloc_line (void *src) |
| Zero-allocate one cache line of the data/operand cache. | |
| static void | dcache_alloc_line_with_value (void *src, uintptr_t value) |
| Allocate one cache line of the data/operand cache with a value. | |
| static void | dcache_inval_line (void *src) |
| Invalidate one cache line of the data/operand cache. | |
| static void | dcache_purge_line (void *src) |
| Purge one cache line of the data/operand cache. | |
| static void | dcache_wback_line (void *src) |
| Write-back one cache line of the data/operand cache. | |
Driver and API for managing the SH4's cache
| #define CACHE_L1_DCACHE_ASSOC ARCH_CACHE_L1_DCACHE_ASSOC |
Level 1 data cache associativity.
Number of ways in the L1 data cache.
| #define CACHE_L1_DCACHE_LINESIZE ARCH_CACHE_L1_DCACHE_LINESIZE |
L1 data cache line size.
The size of each cache line in the L1 data cache.
| #define CACHE_L1_DCACHE_SIZE ARCH_CACHE_L1_DCACHE_SIZE |
Level 1 data cache size.
The capacity of the L1 data cache in bytes.
| #define CACHE_L1_ICACHE_ASSOC ARCH_CACHE_L1_ICACHE_ASSOC |
Level 1 instruction cache associativity.
Number of ways in the L1 instruction cache.
| #define CACHE_L1_ICACHE_LINESIZE ARCH_CACHE_L1_ICACHE_LINESIZE |
L1 instruction cache line size.
The size of each cache line in the L1 instruction cache.
| #define CACHE_L1_ICACHE_SIZE ARCH_CACHE_L1_ICACHE_SIZE |
Level 1 instruction cache size.
The capacity of the L1 instruction cache in bytes.
| #define CACHE_L2_CACHE_ASSOC ARCH_CACHE_L2_CACHE_ASSOC |
Level 2 cache associativity.
Number of ways in the L2 cache.
| #define CACHE_L2_CACHE_LINESIZE ARCH_CACHE_L2_CACHE_LINESIZE |
Level 2 cache line size.
The size of each cache line in the L2 cache.
| #define CACHE_L2_CACHE_SIZE ARCH_CACHE_L2_CACHE_SIZE |
Level 2 cache size.
The capacity of the L2 cache in bytes.
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inlinestatic |
Allocate one cache line of the data/operand cache.
This function allocates a cache line of the data/operand cache. The initial content of the allocated cache line is undefined.
| src | The address to allocate (32-byte aligned) |
References arch_dcache_alloc_line().
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inlinestatic |
Allocate one cache line of the data/operand cache with a value.
This function allocates a cache line of the data/operand cache. The specified value is written at the beginning of the cache line. The initial content of the rest of the cache line is undefined.
| src | The address to allocate (32-byte aligned) |
| value | The value written to the beginning of the cache line. |
References arch_dcache_alloc_line_with_value().
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inlinestatic |
Invalidate one cache line of the data/operand cache.
This function invalidates a cache line of the data/operand cache. The data inside the cache line is not written back to memory, and the cache line is marked as free.
| src | The address to invalidate |
References arch_dcache_inval_line().
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inlinestatic |
Invalidate the data/operand cache.
This function invalidates a range of the data/operand cache. If you care about the contents of the cache that have not been written back yet, use dcache_wback_range() before using this function.
| start | The physical address to begin invalidating at. |
| count | The number of bytes to invalidate. |
References arch_dcache_inval_range(), and start().
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inlinestatic |
Prefetch one block to the data/operand cache.
This function prefetch a block of the data/operand cache.
| src | The physical address to prefetch. |
References arch_dcache_pref_line().
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inlinestatic |
Purge all the data/operand cache.
This function flushes the entire data/operand cache, ensuring that all cache blocks marked as dirty are written back to memory and all cache entries are invalidated. It does not require an additional buffer and is preferred when memory resources are constrained.
References arch_dcache_purge_all().
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inlinestatic |
Purge one cache line of the data/operand cache.
This function purges a cache line of the data/operand cache. If the cache line is dirty, the data is written back to memory, and then the cache line is marked as free.
| src | The address to purge |
References arch_dcache_purge_line().
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inlinestatic |
Purge the data/operand cache.
This function flushes a range of the data/operand cache, forcing a write- back and then invalidates all of the data in the specified range.
| start | The physical address to begin purging at. |
| count | The number of bytes to purge. |
References arch_dcache_purge_range(), and start().
Referenced by main().
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inlinestatic |
Perform a write-back on the the whole data/operand cache.
This function flushes all the data/operand cache, forcing a write- back on all of the cache blocks that are marked as dirty.
References arch_dcache_wback_all().
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inlinestatic |
Write-back one cache line of the data/operand cache.
This function flushes a cache line of the data/operand cache. If the cache line is dirty, the data is written back to memory. The cache line is not invalidated.
| src | The address to flush |
References arch_dcache_wback_line().
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inlinestatic |
Perform a write-back on the data/operand cache.
This function flushes a range of the data/operand cache, forcing a write- back on all of the data in the specified range. This does not invalidate the cache in the process (meaning the blocks will still be in the cache, just not marked as dirty after this has completed). If you wish to invalidate the cache as well, call dcache_inval_range() after calling this function or use dcache_purge_range() instead of dcache_wback_range().
| start | The physical address to begin flushing at. |
| count | The number of bytes to write back. |
References arch_dcache_wback_range(), and start().
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inlinestatic |
Zero-allocate one cache line of the data/operand cache.
This function allocates a cache line of the data/operand cache. The allocated cache line will be zeroed.
| src | The address to allocate (32-byte aligned) |
References arch_dcache_zero_alloc_line().
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inlinestatic |
Invalidate the instruction cache.
This instruction invalidates a range of the instruction cache.
| start | The physical address to begin invalidation at. |
| count | The number of bytes to invalidate. |
References arch_icache_inval_range(), and start().
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inlinestatic |
Synchronize the instruction cache.
This function ensures that the instruction cache is synchronized with the data/operand cache. It is functionally the same as calling dcache_wback_range() followed by icache_inval_range(), but may be implemented in a more optimized way.
| start | The physical address to begin invalidation at. |
| count | The number of bytes to invalidate. |
References arch_icache_sync_range(), and start().