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Independent SDK for the Sega Dreamcast
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asic.h
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1/* KallistiOS ##version##
2
3 dc/asic.h
4 Copyright (C) 2001-2002 Megan Potter
5
6*/
7
8/** \file dc/asic.h
9 \brief Dreamcast ASIC event handling support.
10 \ingroup asic
11
12 This file provides definitions of the events that the ASIC (a part of the
13 PVR) in the Dreamcast can trigger as IRQs, and ways to set responders for
14 those events. Pretty much, this covers all IRQs that aren't generated
15 internally in the SH4 (SCIF and the SH4 DMAC can generate their own IRQs,
16 as well as the trapa instruction, and various exceptions -- those are not
17 dealt with here).
18
19 \author Megan Potter
20*/
21
22#ifndef __DC_ASIC_H
23#define __DC_ASIC_H
24
25#include <sys/cdefs.h>
26__BEGIN_DECLS
27
28#include <stdint.h>
29
30/** \defgroup asic Events
31 \brief Events pertaining to the DC's System ASIC
32 \ingroup system
33
34*/
35
36/* All event codes are two 8-bit integers; the top integer is the event code
37 register to look in to check the event (and to acknowledge it). The
38 register to check is 0xa05f6900+4*regnum. The bottom integer is the
39 bit index within that register. */
40
41/** \defgroup asic_events Event Codes
42 \brief Values for various Holly event codes
43 \ingroup asic
44 @{
45*/
46
47/** \defgroup asic_events_pvr PowerVR
48 \brief Event code values for PowerVR events
49 \ingroup asic_events
50
51 These are events that the PVR itself generates that can be hooked.
52 @{
53*/
54#define ASIC_EVT_PVR_RENDERDONE_VIDEO 0x0000 /**< \brief Video render stage completed */
55#define ASIC_EVT_PVR_RENDERDONE_ISP 0x0001 /**< \brief ISP render stage completed */
56#define ASIC_EVT_PVR_RENDERDONE_TSP 0x0002 /**< \brief TSP render stage completed */
57#define ASIC_EVT_PVR_VBLANK_BEGIN 0x0003 /**< \brief VBLANK begin interrupt */
58#define ASIC_EVT_PVR_VBLANK_END 0x0004 /**< \brief VBLANK end interrupt */
59#define ASIC_EVT_PVR_HBLANK_BEGIN 0x0005 /**< \brief HBLANK begin interrupt */
60
61#define ASIC_EVT_PVR_YUV_DONE 0x0006 /**< \brief YUV completed */
62#define ASIC_EVT_PVR_OPAQUEDONE 0x0007 /**< \brief Opaque list completed */
63#define ASIC_EVT_PVR_OPAQUEMODDONE 0x0008 /**< \brief Opaque modifiers completed */
64#define ASIC_EVT_PVR_TRANSDONE 0x0009 /**< \brief Transparent list completed */
65#define ASIC_EVT_PVR_TRANSMODDONE 0x000a /**< \brief Transparent modifiers completed */
66
67#define ASIC_EVT_PVR_DMA 0x0013 /**< \brief PVR DMA complete */
68#define ASIC_EVT_PVR_PTDONE 0x0015 /**< \brief Punch-thrus completed */
69
70#define ASIC_EVT_PVR_ISP_OUTOFMEM 0x0200 /**< \brief ISP out of memory */
71#define ASIC_EVT_PVR_STRIP_HALT 0x0201 /**< \brief Halt due to strip buffer error */
72#define ASIC_EVT_PVR_PARAM_OUTOFMEM 0x0202 /**< \brief Param out of memory */
73#define ASIC_EVT_PVR_OPB_OUTOFMEM 0x0203 /**< \brief OPB went past PVR_TA_OPB_END */
74#define ASIC_EVT_PVR_TA_INPUT_ERR 0x0204 /**< \brief Vertex input error */
75#define ASIC_EVT_PVR_TA_INPUT_OVERFLOW 0x0205 /**< \brief Vertex input overflowed queue */
76/** @} */
77
78/** \defgroup asic_events_gd GD-ROM Drive
79 \brief Event code values for GD-ROM events
80 \ingroup asic_events
81
82 These are events that the GD-ROM drive generates that can be hooked.
83 @{
84*/
85#define ASIC_EVT_GD_COMMAND 0x0100 /**< \brief GD-Rom Command Status */
86#define ASIC_EVT_GD_DMA 0x000e /**< \brief GD-Rom DMA complete */
87#define ASIC_EVT_GD_DMA_OVERRUN 0x020d /**< \brief GD-Rom DMA overrun */
88#define ASIC_EVT_GD_DMA_ILLADDR 0x020c /**< \brief GD-Rom DMA illegal address */
89/** @} */
90
91/** \defgroup asic_events_maple Maple
92 \brief Event code values for Maple events
93 \ingroup asic_events
94
95 These are events that Maple generates that can be hooked.
96 @{
97*/
98#define ASIC_EVT_MAPLE_DMA 0x000c /**< \brief Maple DMA complete */
99#define ASIC_EVT_MAPLE_ERROR 0x000d /**< \brief Maple error (?) */
100/** @} */
101
102/** \defgroup asic_events_spu AICA
103 \brief Event code values for AICA events
104 \ingroup asic_events
105
106 These are events that the SPU (AICA) generates that can be hooked.
107 @{
108*/
109#define ASIC_EVT_SPU_DMA 0x000f /**< \brief SPU (G2 channel 0) DMA complete */
110#define ASIC_EVT_SPU_IRQ 0x0101 /**< \brief SPU interrupt */
111/** @} */
112
113/** \defgroup asic_events_g2dma G2 Bus DMA
114 \brief Event code values for G2 Bus events
115 \ingroup asic_events
116
117 These are events that G2 bus DMA generates that can be hooked.
118 @{
119*/
120#define ASIC_EVT_G2_DMA0 0x000f /**< \brief G2 DMA channel 0 complete */
121#define ASIC_EVT_G2_DMA1 0x0010 /**< \brief G2 DMA channel 1 complete */
122#define ASIC_EVT_G2_DMA2 0x0011 /**< \brief G2 DMA channel 2 complete */
123#define ASIC_EVT_G2_DMA3 0x0012 /**< \brief G2 DMA channel 3 complete */
124/** @} */
125
126/** \defgroup asic_events_ext External Port
127 \brief Event code values for external port events
128 \ingroup asic_events
129
130 These are events that external devices generate that can be hooked.
131 @{
132*/
133#define ASIC_EVT_EXP_8BIT 0x0102 /**< \brief Modem / Lan Adapter */
134#define ASIC_EVT_EXP_PCI 0x0103 /**< \brief BBA IRQ */
135/** @} */
136
137/** @} */
138
139/** \defgroup asic_regs Registers
140 \brief Addresses for various ASIC eveng registers
141 \ingroup asic
142
143 These are the locations in memory where the ASIC registers sit.
144 @{
145*/
146#define ASIC_ACK_A 0xa05f6900 /**< \brief IRQD ACK register */
147#define ASIC_ACK_B 0xa05f6904 /**< \brief IRQB ACK register */
148#define ASIC_ACK_C 0xa05f6908 /**< \brief IRQ9 ACK register */
149
150#define ASIC_IRQD_A 0xa05f6910 /**< \brief IRQD first register */
151#define ASIC_IRQD_B 0xa05f6914 /**< \brief IRQD second register */
152#define ASIC_IRQD_C 0xa05f6918 /**< \brief IRQD third register */
153#define ASIC_IRQB_A 0xa05f6920 /**< \brief IRQB first register */
154#define ASIC_IRQB_B 0xa05f6924 /**< \brief IRQB second register */
155#define ASIC_IRQB_C 0xa05f6928 /**< \brief IRQB third register */
156#define ASIC_IRQ9_A 0xa05f6930 /**< \brief IRQ9 first register */
157#define ASIC_IRQ9_B 0xa05f6934 /**< \brief IRQ9 second register */
158#define ASIC_IRQ9_C 0xa05f6938 /**< \brief IRQ9 third register */
159/** @} */
160
161/** \defgroup asic_irq_lv IRQ Levels
162 \brief values for the various ASIC event IRQ levels
163 \ingroup asic
164
165 You can pick one at hook time, or don't choose anything and the default will
166 be used instead.
167 @{
168*/
169#define ASIC_IRQ9 0 /**< \brief IRQ level 9 */
170#define ASIC_IRQB 1 /**< \brief IRQ level B (11) */
171#define ASIC_IRQD 2 /**< \brief IRQ level D (13) */
172
173#define ASIC_IRQ_MAX 3 /**< \brief Don't take irqs from here up */
174#define ASIC_IRQ_DEFAULT ASIC_IRQ9 /**< \brief Pick an IRQ level for me! */
175/** @} */
176
177/** \brief ASIC event handler type.
178 \ingroup asic
179
180 Any event handlers registered must be of this type. These will be run in an
181 interrupt context, so don't try anything funny.
182
183 \param code The ASIC event code that generated this event.
184 \param data The user pointer that was passed to
185 \ref asic_evt_set_handler.
186 \see asic_events
187*/
188typedef void (*asic_evt_handler)(uint32_t code, void *data);
189
190/** \brief Set or remove an ASIC handler.
191 \ingroup asic
192
193 This function will register an event handler for a given event code, or if
194 the handler is NULL, unregister any that is currently registered.
195
196 \param code The ASIC event code to hook (see \ref asic_events).
197 \param handler The function to call when the event happens.
198 \param data A user pointer that will be passed to the callback.
199
200*/
201void asic_evt_set_handler(uint16_t code, asic_evt_handler handler, void *data);
202
203/** \brief Register a threaded handler with the given ASIC event.
204 \ingroup asic
205
206 This function will spawn a thread, that will sleep until notified when an
207 event happens. It will then call the handler. As the handler is not called
208 in an interrupt context, it can hold locks, and even sleep.
209
210 \param code The ASIC event code to hook (see \ref asic_events).
211 \param handler The function to call when the event happens.
212 \param data A user pointer that will be passed to the callback.
213 \param ack_and_mask An optional function that will be called by the real
214 interrupt handler, to acknowledge and mask the
215 interrupt, so that it won't trigger again while the
216 threaded handler is running.
217 \param unmask An optional function that will be called by the
218 thread after the handler function returned, to
219 re-enable the interrupt.
220*/
222 void *data,
223 void (*ack_and_mask)(uint16_t),
224 void (*unmask)(uint16_t));
225
226/** \brief Unregister any handler set to the given ASIC event.
227 \ingroup asic
228
229 \param code The ASIC event code to unhook (see
230 \ref asic_events).
231*/
232void asic_evt_remove_handler(uint16_t code);
233
234/** \brief Disable all ASIC events.
235 \ingroup asic
236
237 This function will disable hooks for every event that has been hooked. In
238 order to reinstate them, you must individually re-enable them. Not a very
239 good idea to be doing this normally.
240*/
242
243/** \brief Disable one ASIC event.
244 \ingroup asic
245
246 This function will disable the hook for a specified code that was registered
247 at the given IRQ level. Generally, you will never have to do this yourself
248 unless you're adding in some new functionality.
249
250 \param code The ASIC event code to unhook (see
251 \ref asic_events).
252 \param irqlevel The IRQ level it was hooked on (see
253 \ref asic_irq_lv).
254*/
255void asic_evt_disable(uint16_t code, uint8_t irqlevel);
256
257/** \brief Enable an ASIC event.
258 \ingroup asic
259
260 This function will enable the hook for a specified code and register it at
261 the given IRQ level. You should only register each event at a max of one
262 IRQ level (this will not check that for you), and this does not actually set
263 the hook function for the event, you must do that separately with
264 asic_evt_set_handler(). Generally, unless you're adding in new
265 functionality, you'll never have to do this.
266
267 \param code The ASIC event code to hook (see \ref asic_events).
268 \param irqlevel The IRQ level to hook on (see \ref asic_irq_lv).
269 */
270void asic_evt_enable(uint16_t code, uint8_t irqlevel);
271
272/** \cond Enable ASIC events */
273void asic_init(void);
274/* Shutdown ASIC events, disabling all hooks. */
275void asic_shutdown(void);
276/** \endcond */
277
278__END_DECLS
279
280#endif /* __DC_ASIC_H */
void asic_evt_enable(uint16_t code, uint8_t irqlevel)
Enable an ASIC event.
void asic_evt_disable(uint16_t code, uint8_t irqlevel)
Disable one ASIC event.
void(* asic_evt_handler)(uint32_t code, void *data)
ASIC event handler type.
Definition asic.h:188
int asic_evt_request_threaded_handler(uint16_t code, asic_evt_handler handler, void *data, void(*ack_and_mask)(uint16_t), void(*unmask)(uint16_t))
Register a threaded handler with the given ASIC event.
void asic_evt_set_handler(uint16_t code, asic_evt_handler handler, void *data)
Set or remove an ASIC handler.
void asic_evt_disable_all(void)
Disable all ASIC events.
void asic_evt_remove_handler(uint16_t code)
Unregister any handler set to the given ASIC event.